開路與短路測試
Chroma
OPEN_SHORT_100UA_test()<br> { FORCE_V_DPS(VCC ,0.0V, @8V, @2A, 500.000mA, NORM, ON, 3.000mS); WAIT(5mS); PIN_MODE(ALL_PINS, F0, EDGE, MASK, IO_ON, OFF); RELAY_ON(ALLPINS-x_gpio3e-trig-V18, PDCL, 1mS); SET_CBIT(K0+K1+K2+K5+K6, ON, 1mS); LEVELS(os_lvl, 3mS); FORCE_I_DPS(VCC, -3mA, @10mA, @8V, 2V, NORM, ON, 2mS); JUDGE_V_DPS(VCC, -0.672V, -0.448V, 2mS); FORCE_V_DPS(VCC, 0V, @8V, @100mA, 100mA, NORM, ON, 2mS); TEST_NO(3); RELAY_OFF(ALLPINS-x_gpio3e-trig-V18, PDCL, 1mS); RELAY_ON(ALLPINS-x_gpio3e-trig-V18, OST, 1mS); BACKUP_PLAN_RESULT(); JUDGE_OS(ALLPINS-x_gpio3e-trig-V18,-100uA,-0.612V,-0.408V,2mS); RELAY_OFF(ALLPINS-x_gpio3e-trig-V18, OST, 0mS); RELAY_ON(ALLPINS-x_gpio3e-trig-V18, PDCL, 0mS); FAIL_REJUDGE(1) { DATALOG_MSG = “O/S-100uA_PMU”; TEST_NO(3); PIN_INC(ALLPINS-x_gpio3e-trig-V18) { RELAY_OFF(PIN_DEF, PDCL, 1mS); RELAY_ON(PIN_DEF, PMU, 1mS); FORCE_I_PMU(PMU, -100.000uA, @100uA, @6V, 2V, ON, 1mS); JUDGE_V_PMU(PMU, IFVM, -0.612V,-0.408V, 2mS ); RELAY_OFF(PIN_DEF, PMU, 0mS); RELAY_ON(PIN_DEF, PDCL, 0mS); FORCE_V_PMU (PMU, 0V, @6V, @10mA, 10mA, OFF, 0mS); } RELAY_ON(IO_ALLPINS, PDCL, 1mS); FORCE_V_DPS(DPS_ALLPINS, 0V, @8V, @1A, 1A, NORM, OFF, 2mS); LEVELS(rst_lvl, 3mS); SET_CBIT(K0+K2+K4+K5+K6, OFF, 1mS); |
Map
void OPEN_SHORT_100UA_test() { IoRelay(ALLPINS, IoRLY::PE_RLY_ON); PinModeSet(ALL_PINS, PinMode::CmpMask); UtilityRelaySet(ALLRELAYS, Ctrl::ON); Delay(1 mS); DpsSet(VCC, DpsPM::FIMI, DpsVR::V12,DpsIR::I2m,-3 mA, -2 V, 2 V,2 mS); DpsPower(VCC, Ctrl::ON, 2 mS); DpsTest(VCC,-0.672 V, -0.448 V, “V”, DpsTSM::AVG, 2); FailReJudgeStart(1); PinModeSet(ALLPINS_no_trig, PinMode::Ppmu); PpmuSet(ALLPINS_no_trig, PpmuPM::FIMV, PpmuVR::V6, PpmuIR::I200u, -100.0 uA, -2 V, 2 V); PpmuPower(ALLPINS_no_trig, Ctrl::ON, 2 mS); PpmuTest(ALLPINS_no_trig, -0.612 V, -0.408 V, “V”, PpmuTSM::AVG, 3); PpmuPower(ALLPINS_no_trig, Ctrl::OFF); PpmuSet(ALLPINS_no_trig, PpmuPM::FVMV, PpmuVR::V6, PpmuIR::I2m, 0.0 V); FailReJudgeEnd(); } |