直流參數測試
test
VCD_DC_test { DATALOG = “VCD_DC”; SET_CBIT(allrelays-K3, OFF, 1mS); FORCE_V_DPS(VCC,3.3V, @8V, @1A, 1A, NORM, ON, 3.000mS); PIN_MODE(ALLPINS, NRZ, EDGE, ENABLE, IO_NRZ, OFF); PIN_MODE(FUNC_PINS_I_10, RZ, EDGE, , , OFF); PIN_MODE(FUNC_PINS_I_11, RZ, EDGE, , , OFF); PIN_MODE(FUNC_PINS_IO_19_29, NRZ, EDGE, , , OFF); PIN_MODE(FUNC_PINS_I_19, NRZ, EDGE, , , OFF); PIN_MODE(FUNC_PINS_IO_20_30, NRZ, EDGE, , , OFF); PIN_MODE(FUNC_PINS_IO_20_31, NRZ, EDGE, , , OFF); PIN_MODE(FUNC_PINS_I_20, NRZ, EDGE, , , OFF); PIN_MODE(FUNC_PINS_IO_22_31, NRZ, EDGE, , , OFF); PIN_MODE(FUNC_PINS_IO_23_30, NRZ, EDGE, , , OFF); PIN_MODE(x_gpio66+x_gpio67, , , MASK, , OFF); LEVELS(VC_DAC_lvl, 3mS); RELAY_ON(ALLPINS,PDCL,1mS); SET_JUDGE_MODE(DBL); WAIT(50mS); BACKUP_PLAN_RESULT(); JUDGE_PAT(stm_ate_VCDAC_200414m:st, stm_ate_VCDAC_200414m:sp); FAIL_REJUDGE(2){ MARKERN(TS8, FUNC_PINS_I_11 , 3nS, 21nS, , , , 32nS, 32nS); JUDGE_PAT(stm_ate_VCDAC_200414m:st, stm_ate_VCDAC_200414m:sp); } PIN_MODE(x_gpio66+x_gpio67, , , ENABLE, , OFF); MARKERN(TS8, FUNC_PINS_I_11 , 1nS, 17nS, , , , 32nS, 32nS); } |
Map
void VCD_DC_test() { UtilityRelaySet(allrelay_no_3, Ctrl::OFF); IoRelay(AllPin, IoRLY::PE_RLY_ON); DpsSet(VVC, DpsPM::FVMV, DpsVR::V12, DpsIR::I800m, 3.3 V, -1 A, 1 A, 3 mS); PinModeSet(ALLPINS, PinMode::DrvCmp); PinModeSet(x_66, PinMode::CmpMask); PinModeSet(x_67, PinMode::CmpMask); Delay(50 mS); FunctionStart(“sm_ae_DC”, “st”, “sp”, 1); FunctionTest(); FailReJudgeStart(2); FunctionStart(“st_at_DC”, “st”, “sp”, 1); FunctionTest(); PinModeSet(x_66, PinMode::DrvCmp); PinModeSet(x_67, PinMode::DrvCmp); FailReJudgeEnd(); } |